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? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch march 2012 fsa2267 / fsa2267a rev. 1.0.5 fsa2267 / fsa2267a 0.35 ? low-voltage dual-spdt analog switch features ? typical 0.35 ? on resistance (r on ) for +2.7v supply ? fsa2267a features <10a i cct current when s input is lower than v cc ? r on fatness for +2.7v supply: 0.25 ? maximum ? 1.6mm x 2.1mm 10-lead micropak? package ? broad v cc operating range ? low thd (0.02% typical for 32 ?? load) ? high current handling capability (350ma continuous current <3.3v supply) applications ? cell phone ? pda ? portable media player description the fsa2267 and fsa2267a are dual single pole dou- ble throw (spdt) analog switches. the fsa2267 oper- ates from a single 1.65v to 3.6v supply, while the fsa2267a operates from a single 2.3v to 4.3v supply. each features an ultra-low on resistance of 0.35 ? at a +2.7v supply and 25c. both devices are fabricated with sub-micron cmos technology to achieve fast switching speeds and designed for brea k-before-make operation. fsa2267a features very lo w quiescent current, even when the control voltage is lower than the v cc supply. this feature services the mobile handset applications very well, allowing for the direct interface with baseband processor general-purpose i/os. ordering information . figure 1. application diagram order number top mark package description packing method FSA2267L10X fc 10-lead micropak, 1.6 x 2.1mm, jedec mo-255 5000 units on tape and reel fsa2267al10x fd 10-lead micropak, 1.6 x 2.1mm, jedec mo-255 5000 units on tape and reel fsa2267amux fsa 2267a 10-lead molded small outline package (msop), jedec mo-187, 3.0mm wide 4000 units on tape and reel
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267arev. 1.0.5 2 analog symbols figure 2. analog symbol connections diagram truth table pin descriptions figure 3. 10-lead msop figure 4. 10-lead micropak control input(s) function low logic level b 0 connected to a high logic level b 1 connected to a pin name function 1, 2, 3, 4, 6, 9 1b 0 , 1b 1 , 2b 0 , 2b 1 , 2a, 1a data ports 8, 7 1s, 2s control input 10 vcc supply voltage 5 gnd ground 1b 0 1b 1 2b 0 2b 1 1 a 2 a 1s 2s 1b 0 1b 1 2b 0 2b 1 gnd v cc 1a 1s 2s 2a 10 9 8 7 6 1 2 3 4 5 1b 0 1b 1 2b 0 2b 1 1a 1s 2s 2a 9 8 7 6 1 2 3 4 v cc gnd 10 5
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267arev. 1.0.5 3 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended op erating conditions may affect device reliability. the absolute maximum ratings are stress ratings only.. notes: 1. the input and output negative voltage ratings may be e xceeded if the input and output diode current ratings are observed. 2. minimums define the acceptable range of current. negat ive current should not exceed minimun negative values. recommended oper ating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. note: 3. unused inputs must be held high or low. they may not float. symbol parameter min. max. unit v cc supply voltage -0.5 +5.5 v v s switch voltage (1) -0.5 v cc + 0.5 v v in control input voltage (1) -0.5 5.5 v i ik input diode current (2) -50 ma i sw switch current 350 ma i swpeak peak switch current (pulsed at 1ms duration, <10% duty cycle) 500 ma t stg storage temperature range -65 +150 c t j maximum junction temperature +150 c t l lead temperature (soldering, 10 seconds) +260 c esd human body model: fsa2267 7500 v human body model, jesd22-a114:fsa2267a 7000 v charged device model, jesd22-c101: fsa2267/fsa2267a 1000 v symbol parameter min. max. unit v cc supply voltage v fsa2267 1.65 3.6 v fsa2267a 2.3 4.3 v in control input voltage (3) 0v cc v v sw switch input voltage 0 v cc v t a operating temperature -40 +85 c
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 4 esd protection esd performance of the fsa2267/fsa2267a fsa2267 ? hbm all pins 7.0kv ? cdm all pins 1.0kv fsa2267a ? hbm all pins 7.5kv ? cdm all pins 1.0kv human body model figure 5 shows the schematic representation of the human body model esd event. figure 6 is the ideal waveform representation of the human body model. the device is tested to jedec: jesd22-a114 human body model. charged device model in manufacturing test and handling environments, a more useful model is the charged device model and the fsa2267/fsa2267a has a very good esd immunity to this model. the device is tested to jedec: jesd22- c101 charged device model. iec 61000-4-2 the iec 61000-4-2 standard covers esd testing and performance of finished equi pment and evaluates the equipment in its entirety for esd immunity. fairchild semiconductor has evaluated this device using the iec 6100-4-2 representative system model depicted in figure 7. esd values measured via the iec 61000-4-2 evaluation method are influenced by the specific board layout, board size, and many other fa ctors of the manufacturer?s product application. measured system esd values can- not be guaranteed by fairchild semiconductor to exactly correlate to a manufacturer?s in-house testing due to these application environment variables. fairchild semi- conductor has been able to determine that, for ultra-por- table applications, an enhanced esd immunity, relative to the iec 61000-4-2 specificat ion, can be achieved with the inclusion of a 100 ?? series resistor in the v cc supply path to the analog switch (see figure 8). typical improvements of between 3-6k v of esd immunity (i/o to gnd) have been measured with the inclusion of the resistor with the iec 61000-4-2 representative model. for more information on esd testing methodologies, please refer to: an-6019 fairchild analog switch products esd test methodology overview http://www.fairchildsemi .com/an/an/an-6019.pdf. additional esd test conditions for information regarding test methodologies and perfor- mance levels, please contact fairchild semiconductor. figure 5. human body esd test model figure 6. hbm current waveform figure 7. iec 61000-4-2 esd test model figure 8. esd immunity with 100 ?? resistor 1b 0 1b 1 2b 0 2b 1 1a 1s 2a 2s esd event 100 analog switch supply rail ultra-portable connector v cc
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 5 fsa2267 dc electrical characteristics all typical values are at 25 c unless otherwise specified. notes: 4. on resistance is determined by the voltage drop between a and b pins at the indicated current through the switch. 5. ? r on = r onmax - r onmin measured at identical v cc , temperature, and voltage. 6. flatness is defined as the difference between the maximum and minimum value of r on over the specified range of conditions. symbol parameter conditions v cc t a = +25 ? c t a = ? 40 to +85 ? c units (v) min. typ. max. min. max. v ih input voltage high 2.7 to 3.6 2.0 v 2.3 to 2.7 1.7 1.65 to 1.95 0.65 v cc v il input voltage low 2.7 to 3.6 0.8 v 2.3 to 2.7 0.7 1.65 to 1.95 0.35 v cc i in control input leakage v in = 0v to v cc 1.65 to 3.6 -0.5 0.5 ? a i no(off) , i nc(off) off-leakage current of port nb 0 and nb 1 na = 0.3v, 3.3v, nb 0 or nb 1 = 0.3v, 3.3v or floating 3.6 -5.0 5.0 -50 50 na na = 0.3v, 2.4v, nb 0 or nb 1 = 0.3v, 2.4v or floating 2.7 -5.0 5.0 -50 50 na = 0.3v, 1.65v, nb 0 or nb 1 = 0.3v, 1.65v or floating 1.95 -5.0 5.0 -50 50 i a(on) on leakage current of port 1a and 2a na = 0.3v, 3.3v, nb 0 or nb 1 = 0.3v, 3.3v or floating 3.6 -5.0 5.0 -50 50 na na = 0.3v, 2.4v, nb 0 or nb 1 = 0.3v, 2.4v or floating 2.7 -5.0 5.0 -50 50 na = 0.3v, 1.65v, nb 0 or nb 1 = 0.3v, 1.65v or floating 1.95 -5.0 5.0 -50 50 r on switch on resistance (4) see figure 9 i out = 100ma, nb 0 or nb 1 = 0v, 0.7v, 2.0v, 2.7v 2.7 0.35 0.60 ? i out = 100ma, nb 0 or nb 1 = 0v, 0.7v, 1.6v, 2.3v 2.3 0.45 0.75 i out = 100ma, nb 0 or nb 1 = 0.8v 1.65 1.0 3.9 ? r on on resistance matching between channels (5) i out = 100ma, nb 0 or nb 1 = 0.7v 2.7 0.040 0.075 ? 2.3 0.040 0.080 1.65 0.1 r flat(on) on resistance flatness (6) i out = 100ma, nb 0 or nb 1 = 0v to v cc 2.7 0.25 ? 2.3 0.3 1.65 0.3 i cc quiescent supply current v in = 0v or v cc , i out = 0a 3.6 -100 100 -500 500 na
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 6 fsa2267a dc electri cal characteristics all typical values are at 25 c unless otherwise specified. notes: 7. on resistance is determined by the voltage drop between a and b pins at the indicated current through the switch. 8. ? r on = r onmax - r onmin measured at identical v cc , temperature, and voltage. 9. flatness is defined as the difference between the maximum and minimum value of r on over the specified range of conditions. symbol parameter conditions v cc t a = +25 ? c t a = ? 40 to +85 ? c units (v) min. typ. max. min. max. v ih input voltage high 3.6 to 4.3 1.7 v 2.7 to 3.6 1.5 2.3 to 2.7 1.4 v il input voltage low 3.6 to 4.3 0.7 v 2.7 to 3.6 0.5 2.3 to 2.7 0.4 i in control input leakage v in = 0v to v cc 2.3 to 4.3 -0.5 0.5 a i no(off) , i nc(off) off-leakage current of port nb 0 and nb 1 na = 0.3v, 4.0v, nb 0 or nb 1 = 4.0v, 0.3v or floating 4.3 -10.0 10.0 -100 100 na na = 0.3v, 3.3v, nb 0 or nb 1 = 0.3v, 3.3v or floating 3.6 -5.0 5.0 -50 50 na = 0.3v, 2.4v, nb 0 or nb 1 = 0.3v, 2.4v or floating 2.7 -5.0 5.0 -50 50 i a(on) on leakage current of port 1a and 2a na = 0.3v, 4.0v, nb 0 or nb 1 = 0.3v, 4.0v or floating 4.3 -20.0 20.0 -200 200 na na = 0.3v, 3.3v, nb 0 or nb 1 = 0.3v, 3.3v or floating 3.6 -5.0 5.0 -50 50 na = 0.3v, 3.3v, nb 0 or nb 1 = 0.3v, 3.3v or floating 2.7 -5.0 5.0 -50 50 r on switch on resistance (7) i out = 100ma, nb 0 or nb 1 = 0v, 0.7v, 3.6v, 4.3v 4.3 0.35 0.6 ? i out = 100ma, nb 0 or nb 1 = 0v, 0.7v, 2.3v, 3.0v 3.0 0.35 0.6 i out = 100ma, nb 0 or nb 1 = 0v, 0.7v, 2.0v, 2.7v 2.7 0.35 0.6 i out = 100ma, nb 0 or nb 1 = 0.8v 1.65 1.0 ? r on on resistance matching between channels (8) see figure 10 i out = 100ma, nb 0 or nb 1 = 0.7v 4.3 0.04 0.075 ? 3.0 0.04 0.075 2.7 0.04 0.075 1.65 0.1 r flat(on) on resistance flatness (9) i out = 100ma, nb 0 or nb 1 = 0v to v cc 4.3 0.15 0.25 ? 3.0 0.15 0.25 2.7 0.15 0.25 1.65 0.3 i cc quiescent supply current v in = 0v or v cc , i out = 0a 4.3 -100 80 100 -500 500 na i cct increase in i cc per input v in = 1.8v 4.3 7.0 10.0 15.0 a v in = 2.6v 0.5 2.0 7.0
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267arev. 1.0.5 7 fsa2267 ac electrical characteristics all typical values are at 25c unless otherwise specified. symbol parameter conditions v cc (v) t a = +25c t a = -40 to +85c units figure number min. typ. max. min. max. t on turn-on time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35 pf 2.7 to 3.6 30.0 38.0 42.0 ns figure 11 2.3 to 2.7 29.0 37.0 40.0 1.65 to 1.95 27.0 35.0 38.0 t off turn-off time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35 pf 2.7 to 3.6 13.0 16.0 18.0 ns figure 11 2.3 to 2.7 14.0 18.0 20.0 1.65 to 1.95 15.0 21.0 25.0 t bbm break-before- make time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35 pf 2.7 to 3.6 17.0 2.0 ns figure 12 2.3 to 2.7 15.0 2.0 1.65 to 1.95 12.0 2.0 q charge injection c l = 100 pf, v gen = 0v, r gen = 0 ? 2.7 to 3.6 9.0 pc figure 14 c l = 100 pf, v gen = 0v, r gen = 0 ? 2.3 to 2.7 9.0 c l = 100 pf, v gen = 0v, r gen = 0 ? 1.65 to 1.95 9.0 oirr off isolation f = 100khz, r l = 50 ? , c l = 5pf (stray) 2.7 to 3.6 -80.0 db figure 13 2.3 to 2.7 -80.0 1.65 to 1.95 -80.0 xtalk crosstalk f = 100khz, r l = 50 ? , c l = 5pf (stray) 2.7 to 3.6 -80.0 db figure 13 2.3 to 2.7 -80.0 1.65 to 1.95 -80.0 bw -3db bandwidth r l = 50 ? 1.65 to 3.6 45.0 mhz figure 16 thd total harmonic distortion r l = 32 ? , v in = 2v pk-pk , f = 20hz to 20khz 2.7 to 3.6 0.024 % figure 17 r l = 32 ? , v in = 1.5v pk-pk , f = 20hz to 20khz 2.3 to 2.7 0.015 r l = 32 ? , v in = 1.2v pk-pk , f = 20hz to 20khz 1.65 to 1.95 0.35
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267arev. 1.0.5 8 fsa2267a ac electri cal characteristics all typical value are at 25c unless otherwise specified. capacitance symbol parameter conditions v cc (v) t a = +25c t a = -40 to +85c units figure number min. typ. max. min. max. t on turn-on time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35pf 3.6 to 4.3 37.0 46.0 48.0 ns figure 11 2.7 to 3.6 37.0 50.0 57.0 2.3 to 2.7 60 1.65 570 t off turn-off time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35pf 3.6 to 4.3 15.0 23.0 25.0 ns figure 11 2.7 to 3.6 16.0 30.0 30.0 2.3 to 2.7 50.0 1.65 500 t bbm break-before- make time nb 0 or nb 1 = 1.5v, r l = 50 ? , c l = 35pf 3.6 to 4.3 8.0 2.0 ns figure 12 2.7 to 3.6 8.0 2.0 2.3 to 2.7 8.0 2.0 q charge injection c l = 100 pf, v gen = 0v, r gen = 0 ? 3.6 to 4.3 24.0 pc figure 14 c l = 100 pf, v gen = 0v, r gen = 0 ? 2.7 to 3.6 24.0 c l = 100 pf, v gen = 0v, r gen = 0 ? 2.3 to 2.7 24.0 oirr off isolation f = 100khz, r l = 50 ? , c l = 5pf (stray) 3.6 to 4.3 -75.0 db figure 13 2.7 to 3.6 -75.0 2.3 to 2.7 -75.0 xtalk crosstalk f = 100khz, r l = 50 ? , c l = 5pf (stray) 3.6 to 4.3 -70.0 db figure 13 2.7 to 3.6 -70.0 2.3 to 2.7 -70.0 bw -3db bandwidth r l = 50 ? 2.3 to 4.3 45.0 mhz figure 16 thd total harmonic distortion r l = 32 ? , v in = 2v pk-pk , f = 20hz to 20khz 3.6 to 4.3 0.02 % figure 17 r l = 32 ? , v in = 1.5v pk-pk , f = 20hz to 20khz 2.7 to 3.6 0.02 r l = 32 ? , v in = 1.2v pk-pk , f = 20hz to 20khz 2.3 to 2.7 0.02 symbol parameter conditions v cc (v) t a = +25c t a = -40 to +85c units figure number min. typ. max. min. max. c in control pin input capacitance f = 1mhz 0.0 1.5 pf figure 15 c off b port off capacitance f = 1mhz 3.3 30.0 pf figure 15 c on a port on capacitance f = 1mhz 3.3 126 pf figure 15
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267arev. 1.0.5 9 typical characteristics figure 9. r on at 2.7v for fsa2267 figure 10. r on at 2.7v for fsa2267a
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 10 ac loading and waveforms c l includes fixture and stray capacitance. logic i nput waveforms are invert ed for switches with opposite logic sense. figure 11. turn-on/turn-off timing c l includes fixture and stray capacitance figure 12. break-before-make timing figure 13. off isolation and crosstalk
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 11 ac loading and waveforms (continued) q = (dv out )(c l ) figure 14. charge injection figure 15. on/off capaci tance measurement setup figure 16. bandwidth figure 17. harmonic distortion
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 12 physical dimensions figure 18. 10-lead, micropak?, 1.6 x 2.1mm package drawings are provided as a service to customer s considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairch- ild?s worldwide terms and conditions, specifically the warranty therein, which co vers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. for current tape and reel specif ications, visit fairchild semi conductor?s online packaging area: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. bottom view top view recommended land pattern side view 2x 2x notes: a. package conforms to jedec registration mo-255, variation uabd b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 1994. d. presence of center pad is package supplier dependent. if present is not intended to be soldered a has a black oxide finish. e. drawing filename: mkt-mac10arev5. 0.10 c 0.10 cab 0.05 c ident is er than er lines b c 0.35 0.25 9x 9x 1 4 9 6 0.25 0.15 10 5 0.50 0.56 1.62 0.05 0.00 0.05 c 0.55 max 0.05 c 1.60 (0.35) (0.25) 0.50 10x 10x (0.11) 1.12 1.62 keepout zone, n or vias allowed (0.20) (0.15) 0.35 0.25 0.35 0.25 ail a detail a 2x scale 0.35 0.25 0.65 0.55 d all features (0.36) (0.29) 0.56
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 13 physical dimensions figure 19. pb-free, 10-lead, mo lded small outline package (msop), jedec mo-187, 3.0mm wide package drawings are provided as a service to customer s considering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairch- ild?s worldwide terms and conditions, specifically the warranty therein, which co vers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. for current tape and reel specif ications, visit fairchild semi conductor?s online packaging area: http://www.fairchildsemi.com/products/analog/pdf/msop10_tr.pdf.
fsa2267/fsa2267a 0.35 ? low-voltage dual-spdt analog switch ? 2005 fairchild semiconductor corporation www.fairchildsemi.com fsa2267 / fsa2267a rev. 1.0.5 14

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